Intel Corporation
Recessed metal interconnects to mitigate EPE-related via shorting

Last updated:

Abstract:

Embodiments include an interconnect structure and methods of forming an interconnect structure. In an embodiment, the interconnect structure comprises a semiconductor substrate and an interlayer dielectric (ILD) over the semiconductor substrate. In an embodiment, an interconnect layer is formed over the ILD. In an embodiment, the interconnect layer comprises a first interconnect and a second interconnect. In an embodiment the interconnect structure comprises an electrically insulating plug that separates the first interconnect and the second interconnect. In an embodiment an uppermost surface of the electrically insulating plug is above an uppermost surface of the interconnect layer.

Status:
Grant
Type:

Utility

Filling date:

21 May 2018

Issue date:

21 Jun 2022