Intel Corporation
Tier-aware read and write

Abstract:

A fabric interface apparatus, including: a fabric interface logic to communicatively couple to a fabric; a data interface to communicatively couple to a compute platform including memory resources in at least two memory tiers; and a tier-aware read/write engine (TARWE) to: receive an incoming packet via the fabric; parse a header of the incoming packet to identify a hint for directing the incoming packet to a preferred memory tier; and write the incoming packet to the preferred memory tier.