Intel Corporation
CONFIGURATION OF A PACKET PROCESSING PIPELINE

Last updated:

Abstract:

Examples described herein relate to a packet processing device comprising a programmable packet processing pipeline that is logically partitioned into multiple domains including privileged and unprivileged domains. The multiple domains can span one or more stages of the programmable packet processing pipeline, wherein at least one stage is to perform match action operations.

Status:
Application
Type:

Utility

Filling date:

8 Feb 2022

Issue date:

26 May 2022