Intel Corporation
Thin film based 1T-1R cell with resistive random access memory below a bitline

Abstract:

Described is a memory cell which comprises: a transistor positioned in a backend of a die, the transistor comprising: a source structure and a drain structure; a gate structure between the source structure and the drain structure; a source contact coupled to and above the source structure and a drain contact coupled to and below the drain structure; and a Resistive Random Access Memory (RRAM) device coupled to the drain contact.