Intel Corporation
Pin must-connects for improved performance

Last updated:

Abstract:

An integrated circuit structure includes a first metal level comprising a first plurality of interconnect lines along a first direction. A cell is on at least the first metal level, the cell having a pin comprising more than two of the first plurality of interconnect lines. A second metal level comprising a second plurality of interconnect lines overlays the first metal level, where the second plurality of interconnect lines is along a second direction. Two or more vias are on at least one of the second plurality of interconnect lines to connect to the pin.

Status:
Grant
Type:

Utility

Filling date:

27 Dec 2017

Issue date:

9 Aug 2022