Intel Corporation
CONTROLLING COARSE PIXEL SIZE FROM A STENCIL BUFFER
Last updated:
Abstract:
Systems, apparatuses and methods may provide for technology that determines a stencil value and uses the stencil value to control, via a stencil buffer, a coarse pixel size of a graphics pipeline. Additionally, the stencil value may include a first range of bits defining a first dimension of the coarse pixel size and a second range of bits defining a second dimension of the coarse pixel size. In one example, the coarse pixel size is controlled for a plurality of pixels on a per pixel basis.
Status:
Application
Type:
Utility
Filling date:
7 Feb 2022
Issue date:
18 Aug 2022