Intel Corporation
Method and apparatus for a binary neural network mapping scheme utilizing a gate array architecture

Abstract:

In one embodiment, an apparatus comprises a plurality of bitwise multipliers, a bitwise multiplier of the plurality of bitwise multipliers to multiply a binary synapse weight value of a neural network by a binary activation state value of a neuron of the neural network. The apparatus further comprises a plurality of majority voters, a majority voter of the plurality of majority voters to receive outputs of a first group of bitwise multipliers and to generate a majority result to indicate whether a majority of outputs of the first group of bitwise multipliers are set to a first binary value or a second binary value. The apparatus also comprises a first plurality of reconfigurable connections coupled to outputs of the plurality of bitwise multipliers and inputs of the plurality of majority voters.