Intel Corporation
Techniques to couple high bandwidth memory device on silicon substrate and package substrate
Last updated:
Abstract:
Techniques to couple a high bandwidth memory device on a silicon substrate and a package substrate are disclosed. Examples include selectively activating input/out (I/O) or command and address (CA) contacts on a bottom side of a logic layer for the high bandwidth device based on a mode of operation. The I/O and CA contacts are for accessing one or more memory devices include in the high bandwidth memory device via one or more data channels.
Status:
Grant
Type:
Utility
Filling date:
8 Jan 2020
Issue date:
6 Jul 2021