Intel Corporation
Encapsulated vertical interconnects for high-speed applications and methods of assembling same
Last updated:
Abstract:
A semiconductor package substrate includes an encapsulated interconnect on a land side of the substrate. The encapsulated interconnect includes an integral metallic structure that has a smaller contact end against the semiconductor package substrate, and a larger contact end for board mounting.
Status:
Grant
Type:
Utility
Filling date:
19 Feb 2019
Issue date:
29 Jun 2021