Intel Corporation
Gate electrode having a capping layer

Last updated:

Abstract:

A method of manufacturing a semiconductor device and a novel semiconductor device are disclosed herein. An exemplary method includes sputtering a capping layer in-situ on a gate dielectric layer, before any high temperature processing steps are performed. Vacancies in the gate dielectric layer may be filled with capping layer material.

Status:
Grant
Type:

Utility

Filling date:

1 Jun 2020

Issue date:

8 Jun 2021