Intel Corporation
GENERIC LINEAR UNIT HARDWARE ACCELERATOR

Abstract:

Embodiments of apparatuses, methods, and systems for a generic linear unit hardware accelerator are disclosed. In an embodiment, an apparatus includes a comparator, an exponential subunit, a multiplier subunit, and an adder subunit. The apparatus is to receive an input tensor, a threshold, an exponential enable, a scaling factor, and a bias factor and is to perform a transformation function on the input tensor to generate an output tensor.