Intel Corporation
METALLIC REGIONS TO SHIELD A MAGNETIC FIELD SOURCE

Abstract:

Embodiments described herein may be related to apparatuses, processes, and techniques related to a shielding layer to be inserted under an inductor footprint to mitigate the impact of electromagnetic interference (EMI) onto electrical traces beneath the shielding layer and under the inductor footprint. In embodiments, the electrical traces may be high-speed input/output (HSIO) traces that may be particularly susceptible to data corruption given the level of EMI. In embodiments, the shielding layer may be a high density metallization shield within dielectric stack-up layers. In embodiments, these layers may use unique via patterns or shaped metal preform shields to enable routing under an inductor at a higher layer of the PCB. Other embodiments may be described and/or claimed.