Keysight Technologies, Inc.
Method for performing a layout versus schematic test for a multi-technology module

Abstract:

A method for operating a data processing system that causes the data processing system to test the consistency between a schematic description of an electronic circuit and a physical implementation of that circuit includes a master device having a plurality of component devices connected by a network of conductors is disclosed. Each of the component devices has a plurality of package pins that connect the component device to the network of conductors. Information specifying a schematic netlist generated from the schematic description and specifying a layout description of the physical implementation is received by the data processing system. The layout description specifies the network of conductors. The data processing system determines any package shorts in the component devices and generates a layout netlist from the layout description. The layout netlist is compared with the schematic netlist.