Micron Technology, Inc.
APPARATUS WITH LATCH BALANCING MECHANISM AND METHODS FOR OPERATING THE SAME

Abstract:

Methods, apparatuses, and systems related to a memory device are described. The memory device may include local latching circuits each having a retention circuit and a driving circuit. The retention circuit may be configured to provide local storage of broadcasted information for a down-stream circuit. The driving circuit may be configured to connect a first voltage and a second voltage to the retention circuit at different times across the broadcast and the local storage.