Micron Technology, Inc.
Systems and methods for plate voltage regulation during memory array access
Last updated:
Abstract:
A memory device may include a memory array comprising at least two sections. Each of the sections may further include multiple memory cells. The memory device may also include one or more controllers designed to receive one or more commands to initiate writing logical data to the multiple memory cells of a first section and a second section. Additionally, the writing may alternate between the first section and the second section until the first section and second section have been entirely written with the logical data.
Status:
Grant
Type:
Utility
Filling date:
30 Aug 2019
Issue date:
10 Aug 2021