Micron Technology, Inc.
Memory device with dynamic cache management

Abstract:

A memory system includes a memory array having a plurality of memory cells; and a controller coupled to the memory array, the controller configured to: select a garbage collection (GC) source block storing valid data, and designate a storage mode for an available memory block based on the valid data, wherein the storage mode is for configuring memory cells in the available memory block as cache memory that stores a number of bits less than maximum storage capacities thereof for subsequent or upcoming data writes.