Micron Technology, Inc.
Memory devices with user-defined tagging mechanism

Last updated:

Abstract:

A memory device includes a memory array with memory blocks each having a plurality of memory cells, and one or more current monitors configured to measure current during post-deployment operation of the memory device; and a controller configured to identify a bad block within the memory blocks based on the measured current, and disable the bad block for preventing access thereof during subsequent operations of the memory device.

Status:
Grant
Type:

Utility

Filling date:

7 May 2019

Issue date:

17 Aug 2021