Micron Technology, Inc.
Memory cells with asymmetrical electrode interfaces

Last updated:

Abstract:

Methods, systems, and devices for memory cells with asymmetrical electrode interfaces are described. A memory cell with asymmetrical electrode interfaces may mitigate shorts in adjacent word lines, which may be leveraged for accurately reading a stored value of the memory cell. The memory device may include a self-selecting memory component with a top surface area in contact with a top electrode and a bottom surface area in contact with a bottom electrode, where the top surface area in contact with the top electrode is a different size than the bottom surface area in contact with the bottom electrode.

Status:
Grant
Type:

Utility

Filling date:

23 Apr 2020

Issue date:

28 Sep 2021