Micron Technology, Inc.
MEMORY OPERATION WITH DOUBLE-SIDED ASYMMETRIC DECODERS

Abstract:

As described, an apparatus may include a memory cell corresponding to a memory address and an access line forming at least a portion of the memory cell. The apparatus may include a first decoder associated with a first delivery driver coupled to a first end of the access line and a second decoder associated with a second delivery driver coupled to another end of the access line.