Micron Technology, Inc.
APPARATUSES AND METHODS FOR SELF-TEST MODE ABORT CIRCUIT

Abstract:

Apparatuses, systems, and methods for self-test mode abort circuit. Memory devices may enter a self-test mode and perform testing operations on the memory array. During the self-test mode, the memory device may ignore external communications. The memory includes an abort circuit which may terminate the self-test mode if it fails to properly finish. For example, the abort circuit may count an amount of time since the self-test mode began and end the self-test mode if that amount of time meets or exceeds a threshold, which may be based off of the expected amount of time for the testing operations to complete.