Micron Technology, Inc.
Converting a multi-plane write operation into multiple single plane write operations performed in parallel on a multi-plane memory device

Last updated:

Abstract:

A processing device in a memory system receives a request to write a multi-plane segment of data to a memory device, the memory device comprising a plurality of planes. The processing device divides the multi-plane segment of data into a plurality of single-plane segments of data and concurrently performs a plurality of write operations to write each of the plurality of single-plane segments of data to a corresponding plane of the plurality of planes of the memory device.

Status:
Grant
Type:

Utility

Filling date:

30 Apr 2020

Issue date:

5 Oct 2021