Micron Technology, Inc.
METHOD AND DEVICE FOR SELF TRIMMING MEMORY DEVICES

Abstract:

The present disclosure relates to integrated memory device including: an array of memory cells with decoding and sensing circuitry; a memory controller; read and write circuitry associated to the sensing circuitry; logic circuit portions in the read and write circuitry including at least a logic element receiving a data stream on a data input and a clock signal on a clock input; at least a programmable or trimmable delay element or circuit upstream to the data input or the clock input for self trimming the internal timing of said at least a logic element by aligning in time the clock signal and/or the data stream. The disclosure further relates to methods for setting operating parameters of the integrated circuit, in particular for self trimming an internal timing of the integrated circuit.