Micron Technology, Inc.
Semiconductor memory device and method of forming the same
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Abstract:
A semiconductor memory device including an access transistor configured as a vertical transistor comprises a channel portion and a pair of source/drain regions; a storage capacitor connected to one of the pair of source/drain regions; a bit line connected to the other of the pair of source/drain regions, a first semiconductor layer provided in the source/drain region to which the bit line is connected. Preferably, the first semiconductor layer comprises SiGe.
Status:
Grant
Type:
Utility
Filling date:
18 Mar 2020
Issue date:
9 Nov 2021