Micron Technology, Inc.
Management of power state transitions of a memory sub-system

Abstract:

A duration of time for a first idle state of a memory sub-system is determined, where the memory sub-system includes an active state and a second idle state. A first command is received to transition from the active state to the second idle state. In response to the first command, the memory sub-system is transitioned to the first idle state. The memory sub-system is transitioned from the first idle state to the second idle state in response to an expiration of the duration of time.