Micron Technology, Inc.
Read Spike Mitigation in Integrated Circuit Memory
Last updated:
Abstract:
An integrated circuit memory device, having: a first wire; a second wire; a memory cell connected between the first wire and the second wire; a first voltage driver connected to the first wire; and a second voltage driver connected to the second wire. During an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up and holding a voltage applied on the first wire.
Status:
Application
Type:
Utility
Filling date:
5 Aug 2021
Issue date:
25 Nov 2021