Micron Technology, Inc.
Systems and methods for packing data in a scalable memory system protocol

Last updated:

Abstract:

A memory device includes a memory component that stores data and a processor. The processor may receive requests from a requesting component to perform a plurality of data operations, generate a plurality of packets associated with the plurality of data operations, and continuously transmit each of the plurality of packets until each of the plurality of packets are transmitted. Each of the plurality of packets after the first packet of the plurality of packets is transmitted on a subsequent clock cycle immediately after a previous packet is transmitted.

Status:
Grant
Type:

Utility

Filling date:

26 Nov 2019

Issue date:

7 Dec 2021