Micron Technology, Inc.
Secure Serial Peripheral Interface (SPI) Flash

Abstract:

A secure memory device is disclosed. In one embodiment, the memory device includes a controller configured to decode and execute commands issued by a host device; a cryptographic engine, the cryptographic engine configured to authenticate a subset of the commands, the subset of the commands each including a digital signature; and a first monotonic counter, the first monotonic counter being incremented after executing at least some of the subset of the commands, wherein a value of the first monotonic counter is used to generate the digital signature.