Micron Technology, Inc.
Error correction using hierarchical decoders

Last updated:

Abstract:

Apparatuses and methods related to correcting errors can include using FD decoders and AD decoders. Correcting errors can include receiving input data from the memory array, performing a plurality of operations associated with an error detection on the input data, and providing, based on processing the input data, output data, a validation flag, and a plurality of parity bits to a second decoder hosted by a controller coupled to the memory device.

Status:
Grant
Type:

Utility

Filling date:

30 Mar 2020

Issue date:

1 Feb 2022