Micron Technology, Inc.
Sense lines in three-dimensional memory arrays, and methods of forming the same
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Abstract:
An example apparatus includes a three-dimensional (3D) memory array including a sense line and a plurality of vertical stacks. Each respective on of the vertical stacks includes a different respective portion of the sense line, a first memory cell coupled to that portion of the sense line, a second memory cell coupled to that portion of the sense line, a first access line coupled to the first memory cell and a second access line coupled to the second memory cell. The first and second access lines are perpendicular to the sense line.
Status:
Grant
Type:
Utility
Filling date:
8 May 2020
Issue date:
7 Jun 2022