Micron Technology, Inc.
Reconfigurable processing-in-memory logic

Last updated:

Abstract:

An example system implementing a processing-in-memory pipeline includes: a memory array to store data in a plurality of memory cells electrically coupled to a plurality of wordlines and a plurality of bitlines; a logic array coupled to the memory array, the logic array to implement configurable logic controlling the plurality of memory cells; and a control block coupled to the memory array and the logic array, the control block to control a computational pipeline to perform computations on the data by activating at least one of: one or more bitlines of the plurality of bitlines or one or more wordlines of the plurality of wordlines.

Status:
Grant
Type:

Utility

Filling date:

16 Dec 2020

Issue date:

7 Jun 2022