Micron Technology, Inc.
VOLTAGE EQUALIZATION FOR PILLARS OF A MEMORY ARRAY

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Abstract:

Methods, systems, and devices for voltage equalization for pillars of a memory array are described. In some examples, a memory array may be configured with conductive pillars that are each coupled with a respective set of memory cells, and may be selectively coupled with an access line. To support a dissipation or equalization of charge from unselected pillars, the memory array may be configured with a material layer or level that provides a dissipative coupling, such as a coupling having a relatively high resistance or a degree of capacitance, with a ground voltage or other voltage source (e.g., to support a passive equalization). Additionally or alternatively, a memory array may be configured to support an active dissipation of accumulated charge or voltage by selectively coupling pillars that have been operated in a floating condition with a ground voltage or other voltage source (e.g., to perform a dynamic equalization).

Status:
Application
Type:

Utility

Filling date:

9 Dec 2020

Issue date:

9 Jun 2022