Micron Technology, Inc.
Memory device with a multiplexed command/address bus
Last updated:
Abstract:
A memory device includes a first plurality of volatile memories, a non-volatile memory, and a controller coupled to the non-volatile memory and including a first controller output. The memory device further includes a registering clock driver (RCD) including a first RCD output, and a first multiplexer including a first mux input coupled to the first RCD output, a second mux input coupled to the first controller output, and a first mux output coupled to the first plurality of volatile memories. The first multiplexer can be configured to provide command/address signals from one of the RCD and the controller to the first plurality of volatile memories.
Status:
Grant
Type:
Utility
Filling date:
6 Jan 2021
Issue date:
5 Jul 2022