Micron Technology, Inc.
Reconfigurable processing-in-memory logic using look-up tables
Last updated:
Abstract:
An example system implementing a processing-in-memory pipeline includes: a memory array to store a plurality of look-up tables (LUTs) and data; a control block coupled to the memory array, the control block to control a computational pipeline by activating one or more LUTs of the plurality of LUTs; and a logic array coupled to the memory array and the control block, the logic array to perform, based on control inputs received from the control block, logic operations on the activated LUTs and the data.
Status:
Grant
Type:
Utility
Filling date:
17 Jul 2020
Issue date:
2 Aug 2022