Micron Technology, Inc.
Writing and querying operations in content addressable memory systems with content addressable memory buffers

Last updated:

Abstract:

An apparatus (e.g., a content addressable memory system) can have a controller, a first content addressable memory coupled to the controller, and a second content addressable memory coupled to the controller. The controller can be configured to cause the first content addressable memory to write data in the first content addressable memory, cause the second content addressable memory to write the data in the second content addressable memory, and cause the second content addressable memory to query the data written in the second content addressable memory while the first content addressable memory continues to write the data in the first content addressable memory.

Status:
Grant
Type:

Utility

Filling date:

15 Feb 2021

Issue date:

23 Aug 2022