Micron Technology, Inc.
Peripheral logic circuits under DRAM memory arrays
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Abstract:
Various embodiments comprise methods and related apparatuses formed from those methods for placing at least portions of peripheral circuits under a DRAM memory array, where the peripheral circuits are used to control an operation of the DRAM memory array. In an embodiment, a memory apparatus includes a DRAM memory array and at least one peripheral circuit formed under the DRAM memory array, where the at least one peripheral circuit includes at least one circuit type selected from sense amplifiers and sub-word line drivers. Additional apparatuses and methods are also disclosed.
Status:
Grant
Type:
Utility
Filling date:
2 Nov 2017
Issue date:
8 Jun 2021