Micron Technology, Inc.
Buses for pattern-recognition processors
Last updated:
Abstract:
Disclosed are methods and systems, among which is a system that includes a pattern-recognition processor, a central processing unit (CPU) coupled to the pattern-recognition processor via a pattern-recognition bus, and memory coupled to the CPU via a memory bus. In some embodiments, the pattern-recognition bus and the memory bus form about the same number of connections to the pattern-recognition processor and the memory, respectively.
Status:
Grant
Type:
Utility
Filling date:
16 Jan 2019
Issue date:
1 Jun 2021