Micron Technology, Inc.
Three-dimensional devices having reduced contact length

Last updated:

Abstract:

Various embodiments comprise apparatuses and methods including a memory array having alternating levels of semiconductor materials and dielectric material with strings of memory cells formed on the alternating levels. One such apparatus includes a memory array formed substantially within a cavity of a substrate. Peripheral circuitry can be formed adjacent to a surface of the substrate and adjacent to the memory array. Additional apparatuses and methods are described.

Status:
Grant
Type:

Utility

Filling date:

2 Jun 2020

Issue date:

25 May 2021