Micron Technology, Inc.
Integrated assemblies having ferroelectric transistors with heterostructure active regions
Last updated:
Abstract:
Some embodiments include a ferroelectric transistor having an active region which includes a first source/drain region, a second source/drain region, and a body region between the first and second source/drain regions. The body region has a different semiconductor composition than at least one of the first and second source/drain regions to enable replenishment of carrier within the body region. An insulative material is along the body region. A ferroelectric material is along the insulative material. A conductive gate material is along the ferroelectric material.
Status:
Grant
Type:
Utility
Filling date:
13 Nov 2018
Issue date:
4 May 2021