Micron Technology, Inc.
Memory circuitry
Last updated:
Abstract:
Some memory circuitry comprises a stack of multiple tiers individually comprising memory cells individually comprising an elevationally-extending transistor. The tiers individually comprise multiple access lines that individually electrically couple together a row of the memory cells in that individual tier. The tiers individually comprise access-line-driver circuitry comprising an elevationally-extending transistor.
Status:
Grant
Type:
Utility
Filling date:
13 Jul 2018
Issue date:
4 May 2021