Micron Technology, Inc.
Redundancy in microelectronic devices, and related methods, devices, and systems

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Abstract:

Methods of operating a memory device are disclosed. A method may include enabling a first and second row section units a number of row section units of a memory device in response to a row address. The method may also include comparing a selected column address to a number of column addresses of defective memory cells of a first row section of the first row section unit. Moreover, in response to the selected column address matching a first column address of the number of column addresses, the method may include activating a second row section of the second row section unit, conveying a redundant column select signal to the memory array to select a redundant memory cell of the second row section. Memory devices and systems are also disclosed.

Status:
Grant
Type:

Utility

Filling date:

26 Dec 2019

Issue date:

20 Apr 2021