Micron Technology, Inc.
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH PARTITIONED LOGIC AND ASSOCIATED SYSTEMS AND METHODS
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Abstract:
Stacked semiconductor die assemblies having memory dies stacked between partitioned logic dies and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a first logic die, a second logic die, and a thermally conductive casing defining an enclosure. The stack of memory dies can be disposed within the enclosure and between the first and second logic dies.
Status:
Application
Type:
Utility
Filling date:
9 Mar 2021
Issue date:
15 Jul 2021