Micron Technology, Inc.
Throttle Response Signals from a Memory System
Last updated:
Abstract:
A memory system having memory components and a processing device to: receive, from a host system, write commands to store data in the memory components; store the write commands in a buffer; execute at least a portion of the write commands; determine an amount of available capacity of the buffer that becomes available after execution of at least the portion of the write commands; receive, from the host system, a request for information about available capacity of the buffer; and determine whether to transmit a response signal corresponding to the request based at least in part on the amount of available capacity.
Status:
Application
Type:
Utility
Filling date:
11 Mar 2021
Issue date:
1 Jul 2021