Micron Technology, Inc.
MEMORY OPERATIONS WITH CONSIDERATION FOR WEAR LEVELING
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Abstract:
As described herein, an apparatus may include a memory that includes a first portion, a second portion, and a third portion. The apparatus may also include a memory controller that includes a first logical-to-physical table stored in a buffer memory. The memory controller may determine that the first portion is accessed sequential to the second portion and may adjust the first logical-to-physical table to cause a memory transaction performed by the memory controller to access the third portion as opposed to the first portion.
Status:
Application
Type:
Utility
Filling date:
26 Dec 2019
Issue date:
1 Jul 2021