Micron Technology, Inc.
Memory Cells and Arrays of Memory Cells

Last updated:

Abstract:

A memory cell comprises first, second, third, and fourth transistors individually comprising a transistor gate. First and second ferroelectric capacitors individually have one capacitor electrode elevationally between the transistor gates of the first, second, third, and fourth transistors. Other memory cells are disclosed, as are arrays of memory cells.

Status:
Application
Type:

Utility

Filling date:

25 Feb 2021

Issue date:

17 Jun 2021