NVIDIA Corporation
FACE-TO-FACE DIES WITH A VOID FOR ENHANCED INDUCTOR PERFORMANCE

Abstract:

In accordance with the disclosure, an inductor may be formed over a semiconductor substrate of one or both dies in a face-to-face die arrangement while reducing the parasitic capacitance between the inductor and the adjacent die. In disclosed embodiments, a semiconductor device may include a void (e.g., an air gap) between the inductor and the adjacent die to reduce the parasitic capacitance between the inductor and the adjacent die. The void may be formed in the die that includes the inductor and/or the adjacent die. In some respects, the void may be etched in interface layers (e.g., comprising bump pads and dielectric material) between the semiconductor dies, and may extend along the length of the inductor.