Power Integrations, Inc.
Heterostructure power transistor with AlSiN passivation layer
Last updated:
Abstract:
A heterostructure semiconductor device includes a first active layer and a second active layer disposed on the first active layer. A two-dimensional electron gas layer is formed between the first and second active layers. An AlSiN passivation layer is disposed on the second active layer. First and second ohmic contacts electrically connect to the second active layer. The first and second ohmic contacts are laterally spaced-apart, with a gate being disposed between the first and second ohmic contacts.
Status:
Grant
Type:
Utility
Filling date:
9 Sep 2017
Issue date:
15 Oct 2019