QUALCOMM Incorporated
Magnetic random access memory reference voltage generation

Abstract:

MRAM reference voltage generation is disclosed. In one aspect, a reference circuit for generating a reference level includes first and second non-overlapping paths from a first node to a second node, each path having a precision resistor in series with a set of two or more magnetic MRAM elements electrically connected in parallel. The first set of two or more MRAM elements are in a parallel state and the second set of two or more MRAM elements are in an anti-parallel state, or a first portion of the first and second sets of two or more MRAM elements are in a parallel state and a second portion of the first and second sets of two or more MRAM elements are in an anti-parallel state. A measurement circuit receives a first value indicative of a resistance between the first node and the second node and outputs a reference level based at least in part on the first value.