QUALCOMM Incorporated
Systems and methods for providing a read only memory cell array
Last updated:
Abstract:
A Read Only Memory (ROM) cell array includes: a first transistor coupled to a first word line; a second transistor coupled to a second word line; and a third transistor disposed between the first transistor and the second transistor, the third transistor having a first gate terminal permanently coupled to a power rail.
Status:
Grant
Type:
Utility
Filling date:
6 Aug 2020
Issue date:
7 Sep 2021