QUALCOMM Incorporated
TRANSISTORS IN A LAYERED ARRANGEMENT

Last updated:

Abstract:

Certain aspects of the present disclosure generally relate to transistors in a layered arrangement. An example semiconductor device generally includes a substrate, an n-type metal-oxide-semiconductor (NMOS) transistor, and a p-type metal-oxide-semiconductor (PMOS) transistor. The NMOS transistor is disposed above the substrate and is a gate-all-around (GAA) field-effect transistor (FET). The PMOS transistor is disposed above the substrate, is a fin field-effect transistor (finFET), and is in a layered arrangement with the NMOS transistor.

Status:
Application
Type:

Utility

Filling date:

6 Apr 2020

Issue date:

7 Oct 2021