QUALCOMM Incorporated
Stacked circuits of III-V devices over silicon with high quality integrated passives with hybrid bonding

Abstract:

3D integrated circuit (3DIC) device architecture is disclosed for monolithically heterogeneous integration of III-V devices over Si-CMOS devices with high-quality (HQ) integrated passives devices (IPD) or re-distributed layers (RDL). In addition, a thermal spreader may be added over the upper III-V tier to enhance device power performance (e.g., PAE for PA) and device reliability (e.g., with a reduced Tj/junction temperature).